Electrical systems often incorporate phase locking mechanisms to obtain phase continuity with the system. Prior art phase locked loops have often provided this function. Prior art phase locked loops fall into two categories: digital phase locked loops and analog phase locked loops.
Digital phase locked loops are advantageous in that they quickly achieve the desired phase lock. However, they suffer from poor phase lock resolution. This shortcoming becomes highly significant in high frequency systems that require high phase lock resolution.
Analog phase locked loops are advantageous because they provide fine phase lock resolution that is necessary in high performance system. However, they suffer from speed limitations because each adjustment is incrementally small and a larger number of adjustments are necessary. Therefore, with analog phase locked loops one achieves greater phase lock resolution at the expense of slow phase lock timing.
It is an object of this invention to provide an autoranging analog phase locked loop that incorporates the advantages of both digital and analog phase locked loops by quickly achieving a phase lock having a small phase resolution. The autoranging feature additionally allows a simple current starved inverter chain to be used as a wide frequency range voltage controlled oscillator with constant gain, a desirable trait for analog phase locked loop design. Other objects and advantages of the invention will be apparent to those of ordinary skill in the art having reference to the following specification and drawings.